# Tech Jobs in Santa Clara

**182 open roles** across 1 companies.  
Canonical: https://map.stapply.ai/locations/santa-clara

## Top companies hiring in this location
- [Apple](https://map.stapply.ai/jobs/apple)

## Open roles
- [Machine Learning Research Scientist | Engineer - Special Projects](https://map.stapply.ai/jobs/apple/machine-learning-research-scientist-engineer-special-projects-jg3fcj) — Santa Clara
- [AI/ML Engineer - Library Optimization](https://map.stapply.ai/jobs/apple/aiml-engineer-library-optimization-jfzmbv) — Santa Clara
- [GenAI Physical Synthesis Engineer](https://map.stapply.ai/jobs/apple/genai-physical-synthesis-engineer-jfzpav) — Santa Clara
- [GenAI Physical Synthesis Engineer](https://map.stapply.ai/jobs/apple/genai-physical-synthesis-engineer-jfzpas) — Santa Clara
- [Graphics (GPU) Performance Tools/Content Engineer](https://map.stapply.ai/jobs/apple/graphics-gpu-performance-toolscontent-engineer-jfzqqh) — Santa Clara
- [CPU Design Timing Engineer](https://map.stapply.ai/jobs/apple/cpu-design-timing-engineer-jg07rk) — Santa Clara
- [CPU Processor Power Management Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-power-management-verification-engineer-jg0751) — Santa Clara
- [CPU Design Timing Engineer](https://map.stapply.ai/jobs/apple/cpu-design-timing-engineer-jg0750) — Santa Clara
- [CPU CDC/STA Engineer](https://map.stapply.ai/jobs/apple/cpu-cdcsta-engineer-jg074e) — Santa Clara
- [CPU Top-Level Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-top-level-design-verification-engineer-jg0745) — Santa Clara
- [CPU CDC/RDC/STA Engineer](https://map.stapply.ai/jobs/apple/cpu-cdcrdcsta-engineer-jg074a) — Santa Clara
- [CPU CDC/STA Engineer](https://map.stapply.ai/jobs/apple/cpu-cdcsta-engineer-jg074c) — Santa Clara
- [CPU Top-Level Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-top-level-design-verification-engineer-jg0747) — Santa Clara
- [CPU Silicon Validation Engineer](https://map.stapply.ai/jobs/apple/cpu-silicon-validation-engineer-jg07o7) — Santa Clara
- [CPU Processor Performance Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-performance-verification-engineer-jg07o0) — Santa Clara
- [CPU Processor Performance Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-performance-verification-engineer-jg0758) — Santa Clara
- [CPU Processor Performance Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-performance-verification-engineer-jg0757) — Santa Clara
- [CPU Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-design-verification-engineer-jg0756) — Santa Clara
- [CPU Processor Power Management Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-power-management-verification-engineer-jg0754) — Santa Clara
- [CPU Processor Power Management Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-processor-power-management-verification-engineer-jg0753) — Santa Clara
- [CPU Physical Design Methodology and Optimization Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-methodology-and-optimization-engineer-jg071l) — Santa Clara
- [CPU Silicon Validation Engineer](https://map.stapply.ai/jobs/apple/cpu-silicon-validation-engineer-jg07ou) — Santa Clara
- [CPU Clock Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-clock-implementation-engineer-jg070r) — Santa Clara
- [CPU Implementation Silicon Correlation Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-silicon-correlation-engineer-jg070p) — Santa Clara
- [CPU Gate Level Synthesis Engineer](https://map.stapply.ai/jobs/apple/cpu-gate-level-synthesis-engineer-jg0703) — Santa Clara
- [CPU Power Management Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-power-management-microarchitectrtl-engineer-jg07ov) — Santa Clara
- [CPU Gate Level Synthesis Engineer](https://map.stapply.ai/jobs/apple/cpu-gate-level-synthesis-engineer-jg0701) — Santa Clara
- [CPU Power Management Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-power-management-microarchitectrtl-engineer-jg07ox) — Santa Clara
- [CPU Microarchitect/RTL Engineer - Fetch, Out of Order](https://map.stapply.ai/jobs/apple/cpu-microarchitectrtl-engineer-fetch-out-of-order-jg07p1) — Santa Clara
- [CPU Microarchitect/RTL Engineer - Execution, Load/Store](https://map.stapply.ai/jobs/apple/cpu-microarchitectrtl-engineer-execution-loadstore-jg07pr) — Santa Clara
- [CPU ML Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-ml-microarchitectrtl-engineer-jg07pp) — Santa Clara
- [CPU Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-microarchitectrtl-engineer-jg07ps) — Santa Clara
- [CPU Logic Equivalence Check (LEC) Engineer](https://map.stapply.ai/jobs/apple/cpu-logic-equivalence-check-lec-engineer-jg07qp) — Santa Clara
- [CPU Physical Electrical Analysis Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-electrical-analysis-engineer-jg070w) — Santa Clara
- [CPU Physical Electrical Analysis Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-electrical-analysis-engineer-jg070u) — Santa Clara
- [CPU Clock Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-clock-implementation-engineer-jg070t) — Santa Clara
- [CPU Physical Design Methodology and Optimization Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-methodology-and-optimization-engineer-jg071n) — Santa Clara
- [CPU ML Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-ml-microarchitectrtl-engineer-jg09am) — Santa Clara
- [Graphics FE Integration Engineer](https://map.stapply.ai/jobs/apple/graphics-fe-integration-engineer-jg0969) — Santa Clara
- [GPU Physical Design Engineer](https://map.stapply.ai/jobs/apple/gpu-physical-design-engineer-jg095f) — Santa Clara
- [GPU Electrical Analysis Engineer](https://map.stapply.ai/jobs/apple/gpu-electrical-analysis-engineer-jg08ml) — Santa Clara
- [GPU Top Level Physical Design Engineer](https://map.stapply.ai/jobs/apple/gpu-top-level-physical-design-engineer-jg08me) — Santa Clara
- [Wireless RF Compliance Validation Engineer (RSE)](https://map.stapply.ai/jobs/apple/wireless-rf-compliance-validation-engineer-rse-jg096c) — Santa Clara
- [Physical Design Methodology CAD Engineer](https://map.stapply.ai/jobs/apple/physical-design-methodology-cad-engineer-jg09ch) — Santa Clara
- [Graphics (GPU) Architectural Modeling Engineer](https://map.stapply.ai/jobs/apple/graphics-gpu-architectural-modeling-engineer-jg09be) — Santa Clara
- [GPU Design Engineer – Memory Hierarchy](https://map.stapply.ai/jobs/apple/gpu-design-engineer-memory-hierarchy-jg09bf) — Santa Clara
- [GPU Design Engineer – Memory Hierarchy](https://map.stapply.ai/jobs/apple/gpu-design-engineer-memory-hierarchy-jg09bi) — Santa Clara
- [Graphics Power Analysis & Optimization Engineer](https://map.stapply.ai/jobs/apple/graphics-power-analysis-optimization-engineer-jg09cg) — Santa Clara
- [Physical Design Methodology CAD Engineer](https://map.stapply.ai/jobs/apple/physical-design-methodology-cad-engineer-jg09w8) — Santa Clara
- [CPU Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-design-verification-engineer-jg0a0f) — Santa Clara
- [CPU Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-design-verification-engineer-jg0a1e) — Santa Clara
- [CPU Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-engineer-jg0bgv) — Santa Clara
- [CPU Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-engineer-jg0bg8) — Santa Clara
- [CPU Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-engineer-jg0bg5) — Santa Clara
- [CPU Implementation Lead Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-lead-engineer-jg0bg4) — Santa Clara
- [CPU Physical Design Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-engineer-jg0bg3) — Santa Clara
- [CPU Physical Design Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-engineer-jg0bg2) — Santa Clara
- [CPU Physical Design and Integration Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-and-integration-engineer-jg0bg0) — Santa Clara
- [CPU Cache Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-cache-microarchitectrtl-engineer-jg0bei) — Santa Clara
- [Custom Timing Engineer](https://map.stapply.ai/jobs/apple/custom-timing-engineer-jg0bhs) — Santa Clara
- [Circuits Implementation Engineer](https://map.stapply.ai/jobs/apple/circuits-implementation-engineer-jg0bgw) — Santa Clara
- [Custom Circuits Design Engineer](https://map.stapply.ai/jobs/apple/custom-circuits-design-engineer-jg0bg1) — Santa Clara
- [Circuit Design Lead](https://map.stapply.ai/jobs/apple/circuit-design-lead-jg0bg9) — Santa Clara
- [3D Game Artist - Platform Architecture](https://map.stapply.ai/jobs/apple/3d-game-artist-platform-architecture-jg0bki) — Santa Clara
- [Compiler Circuit Designer](https://map.stapply.ai/jobs/apple/compiler-circuit-designer-jg0c4d) — Santa Clara
- [Integration Engineer](https://map.stapply.ai/jobs/apple/integration-engineer-jg0c58) — Santa Clara
- [ASIC Design Engineer](https://map.stapply.ai/jobs/apple/asic-design-engineer-jg0c7q) — Santa Clara
- [ASIC Design Engineer](https://map.stapply.ai/jobs/apple/asic-design-engineer-jg0c7l) — Santa Clara
- [Integration Engineer](https://map.stapply.ai/jobs/apple/integration-engineer-jg0c8f) — Santa Clara
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jg0c8g) — Santa Clara
- [ASIC Design Engineer - Cache Controller](https://map.stapply.ai/jobs/apple/asic-design-engineer-cache-controller-jg0ca7) — Santa Clara
- [ASIC Design Engineer - Cache Controller](https://map.stapply.ai/jobs/apple/asic-design-engineer-cache-controller-jg0cab) — Santa Clara
- [Circuit Design Engineer - Library](https://map.stapply.ai/jobs/apple/circuit-design-engineer-library-jg0drq) — Santa Clara
- [Integration Engineer](https://map.stapply.ai/jobs/apple/integration-engineer-jg0drm) — Santa Clara
- [Standard Cell Design Methodology & Flow Engineer](https://map.stapply.ai/jobs/apple/standard-cell-design-methodology-flow-engineer-jg0dqx) — Santa Clara
- [Integration Engineer](https://map.stapply.ai/jobs/apple/integration-engineer-jg0tyi) — Santa Clara
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jg0txt) — Santa Clara
- [Senior/Staff Software Engineer - AI, Search & Knowledge Platforms](https://map.stapply.ai/jobs/apple/seniorstaff-software-engineer-ai-search-knowledge-platforms-jg0yiz) — Santa Clara
- [Sr. Software Engineer (Distributed System)](https://map.stapply.ai/jobs/apple/sr-software-engineer-distributed-system-jh5qlo) — Santa Clara
- [Machine Learning Manager, FM Runtime](https://map.stapply.ai/jobs/apple/machine-learning-manager-fm-runtime-jg0xrh) — Santa Clara