# Tech Jobs in Beaverton

**78 open roles** across 1 companies.  
Canonical: https://map.stapply.ai/locations/beaverton

## Top companies hiring in this location
- [Apple](https://map.stapply.ai/jobs/apple)

## Open roles
- [Senior Benefits Expert & Chief of Staff](https://map.stapply.ai/jobs/apple/senior-benefits-expert-chief-of-staff-jg44p6) — Beaverton
- [CAD Engineer - Circuit Simulation Methodology](https://map.stapply.ai/jobs/apple/cad-engineer-circuit-simulation-methodology-jfzpci) — Beaverton
- [CAD Engineer  - PDV](https://map.stapply.ai/jobs/apple/cad-engineer-pdv-jfzohd) — Beaverton
- [CAD Engineer - Circuit Simulation Methodology](https://map.stapply.ai/jobs/apple/cad-engineer-circuit-simulation-methodology-jfzpcf) — Beaverton
- [SoC Physical Design Engineer, STA/Timing](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-statiming-jfzpyx) — Beaverton
- [SoC Physical Design Engineer, STA/Timing](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-statiming-jfzpyv) — Beaverton
- [SoC Physical Design Engineer, STA/Timing](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-statiming-jfzpyt) — Beaverton
- [Virtuoso Custom CAD Engineer](https://map.stapply.ai/jobs/apple/virtuoso-custom-cad-engineer-jfzq38) — Beaverton
- [CPU Power Engineer](https://map.stapply.ai/jobs/apple/cpu-power-engineer-jg070x) — Beaverton
- [CAD Engineer - Custom EMIR Methodology](https://map.stapply.ai/jobs/apple/cad-engineer-custom-emir-methodology-jg08eq) — Beaverton
- [CAD Engineer – Design Verification Methodology](https://map.stapply.ai/jobs/apple/cad-engineer-design-verification-methodology-jg07t8) — Beaverton
- [SoC Physical Design Engineer, PnR](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-pnr-jg0974) — Beaverton
- [SoC Physical Design Engineer, PnR](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-pnr-jg08j7) — Beaverton
- [SoC Physical Design Engineer, PnR](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-pnr-jg08j6) — Beaverton
- [CPU Cache Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-cache-microarchitectrtl-engineer-jg0bej) — Beaverton
- [Formal Verification Engineer](https://map.stapply.ai/jobs/apple/formal-verification-engineer-jg0asy) — Beaverton
- [RTL Design Engineer](https://map.stapply.ai/jobs/apple/rtl-design-engineer-jg0c63) — Beaverton
- [Formal Verification Engineer](https://map.stapply.ai/jobs/apple/formal-verification-engineer-jg0c5v) — Beaverton
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jg0c8h) — Beaverton
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jg0c8l) — Beaverton
- [SerDes Circuit Design Engineer](https://map.stapply.ai/jobs/apple/serdes-circuit-design-engineer-jg0cyb) — Beaverton
- [Analog Layout Automation Engineer](https://map.stapply.ai/jobs/apple/analog-layout-automation-engineer-jg0cvv) — Beaverton
- [SoC Power Analysis and Optimization Engineer](https://map.stapply.ai/jobs/apple/soc-power-analysis-and-optimization-engineer-jg0dmm) — Beaverton
- [SoC Power Flow Methodology Engineer](https://map.stapply.ai/jobs/apple/soc-power-flow-methodology-engineer-jg0dmh) — Beaverton
- [ASIC Design and Integration Engineer](https://map.stapply.ai/jobs/apple/asic-design-and-integration-engineer-jg0tww) — Beaverton
- [ASIC Design and Integration Engineer](https://map.stapply.ai/jobs/apple/asic-design-and-integration-engineer-jg0tws) — Beaverton
- [ASIC Design Engineer](https://map.stapply.ai/jobs/apple/asic-design-engineer-jg0dse) — Beaverton
- [ASIC Design Engineer](https://map.stapply.ai/jobs/apple/asic-design-engineer-jg0drj) — Beaverton
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jg0dqu) — Beaverton
- [Emulation Verification Engineer](https://map.stapply.ai/jobs/apple/emulation-verification-engineer-jg0dq2) — Beaverton
- [Software Engineer: SoC System Stress Validation](https://map.stapply.ai/jobs/apple/software-engineer-soc-system-stress-validation-jg2t3g) — Beaverton
- [Software Engineer, System Services & Daemons, Core OS](https://map.stapply.ai/jobs/apple/software-engineer-system-services-daemons-core-os-jh7o9f) — Beaverton
- [Platform Systems Engineering Manager, Core OS](https://map.stapply.ai/jobs/apple/platform-systems-engineering-manager-core-os-jgm2j5) — Beaverton
- [Silicon Validation Software Engineer - High Speed IO Validation](https://map.stapply.ai/jobs/apple/silicon-validation-software-engineer-high-speed-io-validation-jg45ii) — Beaverton
- [CPU MicroArchitect / RTL Engineer - Site Lead](https://map.stapply.ai/jobs/apple/cpu-microarchitect-rtl-engineer-site-lead-jg47jq) — Beaverton
- [CPU Performance and Workload Analysis Engineer, Platform Architecture](https://map.stapply.ai/jobs/apple/cpu-performance-and-workload-analysis-engineer-platform-architecture-jgk161) — Beaverton
- [CPU Performance Architect, Platform Architecture](https://map.stapply.ai/jobs/apple/cpu-performance-architect-platform-architecture-jgk171) — Beaverton
- [CPU Performance & Workload Analysis Architect, Platform Architecture](https://map.stapply.ai/jobs/apple/cpu-performance-workload-analysis-architect-platform-architecture-jgk15c) — Beaverton
- [Systems Performance Architect](https://map.stapply.ai/jobs/apple/systems-performance-architect-jgkmmk) — Beaverton
- [Hardware Security Engineering Program Manager](https://map.stapply.ai/jobs/apple/hardware-security-engineering-program-manager-jgkrsk) — Beaverton
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jglcj7) — Beaverton
- [SoC Power Modeling Engineer](https://map.stapply.ai/jobs/apple/soc-power-modeling-engineer-jgldbj) — Beaverton
- [SoC Power Spec Engineer](https://map.stapply.ai/jobs/apple/soc-power-spec-engineer-jgldat) — Beaverton
- [CAD Engineer  - PDV](https://map.stapply.ai/jobs/apple/cad-engineer-pdv-jgm1sk) — Beaverton
- [CAD Engineer  - PDV](https://map.stapply.ai/jobs/apple/cad-engineer-pdv-jgm1sj) — Beaverton
- [CAD Engineer - Custom EMIR Methodology](https://map.stapply.ai/jobs/apple/cad-engineer-custom-emir-methodology-jgm15c) — Beaverton
- [Factory SoC Test Support Engineering Program Manager](https://map.stapply.ai/jobs/apple/factory-soc-test-support-engineering-program-manager-jgm2ew) — Beaverton
- [Timing Design Engineer](https://map.stapply.ai/jobs/apple/timing-design-engineer-jgmpl8) — Beaverton
- [Design Verification Engineer](https://map.stapply.ai/jobs/apple/design-verification-engineer-jgnx9q) — Beaverton
- [SW Test Development Engineer, Core OS](https://map.stapply.ai/jobs/apple/sw-test-development-engineer-core-os-jh2kfs) — Beaverton
- [CPU Power Engineer](https://map.stapply.ai/jobs/apple/cpu-power-engineer-jh3xfd) — Beaverton
- [CPU Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-design-verification-engineer-jh54et) — Beaverton
- [CPU Design Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-design-verification-engineer-jh54cu) — Beaverton
- [Analog/Mixed-Signal Circuit Design Engineer](https://map.stapply.ai/jobs/apple/analogmixed-signal-circuit-design-engineer-jh553r) — Beaverton
- [CPU CDC/RDC/STA Engineer](https://map.stapply.ai/jobs/apple/cpu-cdcrdcsta-engineer-jh5p7v) — Beaverton
- [Analog Layout Engineer](https://map.stapply.ai/jobs/apple/analog-layout-engineer-jh74z7) — Beaverton
- [Analog Layout Automation Engineer](https://map.stapply.ai/jobs/apple/analog-layout-automation-engineer-jh74gh) — Beaverton
- [SerDes Circuit Design Engineer](https://map.stapply.ai/jobs/apple/serdes-circuit-design-engineer-jh7svf) — Beaverton
- [DDR Design Engineer](https://map.stapply.ai/jobs/apple/ddr-design-engineer-jh7nqa) — Beaverton
- [DDR Design Engineer](https://map.stapply.ai/jobs/apple/ddr-design-engineer-jh7npn) — Beaverton
- [Mixed-Signal Behavioral Modeling Engineer](https://map.stapply.ai/jobs/apple/mixed-signal-behavioral-modeling-engineer-jh7rck) — Beaverton
- [CPU Implementation Engineer](https://map.stapply.ai/jobs/apple/cpu-implementation-engineer-jhmefs) — Beaverton
- [CPU Physical Design Engineer](https://map.stapply.ai/jobs/apple/cpu-physical-design-engineer-jhmduh) — Beaverton
- [CPU Power Management Microarchitect/RTL Engineer](https://map.stapply.ai/jobs/apple/cpu-power-management-microarchitectrtl-engineer-jhmyoe) — Beaverton
- [SoC Power/Performance/Thermal Engineering Program Manager](https://map.stapply.ai/jobs/apple/soc-powerperformancethermal-engineering-program-manager-jhpll5) — Beaverton
- [Silicon Supplier Excellence Engineer](https://map.stapply.ai/jobs/apple/silicon-supplier-excellence-engineer-jhpm45) — Beaverton
- [SerDes Micro Architect](https://map.stapply.ai/jobs/apple/serdes-micro-architect-jhnkvk) — Beaverton
- [SoC Physical Design Engineer, PnR](https://map.stapply.ai/jobs/apple/soc-physical-design-engineer-pnr-jhnq1k) — Beaverton
- [Physical Design Engineer](https://map.stapply.ai/jobs/apple/physical-design-engineer-jhnlny) — Beaverton
- [RTL Design Engineer](https://map.stapply.ai/jobs/apple/rtl-design-engineer-jhnpys) — Beaverton
- [Battery Management IC Engineer](https://map.stapply.ai/jobs/apple/battery-management-ic-engineer-ji68n1) — Beaverton
- [Emulation Verification Engineer](https://map.stapply.ai/jobs/apple/emulation-verification-engineer-jir7ej) — Beaverton
- [CPU Debug and Power Management Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-debug-and-power-management-verification-engineer-jislw9) — Beaverton
- [CPU Debug and Power Management Verification Engineer](https://map.stapply.ai/jobs/apple/cpu-debug-and-power-management-verification-engineer-jislyw) — Beaverton
- [Analog Mixed Signal IP Engineer](https://map.stapply.ai/jobs/apple/analog-mixed-signal-ip-engineer-jvxmqa) — Beaverton
- [Analog Mixed Signal IP Integration Engineer](https://map.stapply.ai/jobs/apple/analog-mixed-signal-ip-integration-engineer-jvxmqw) — Beaverton
- [SoC Validation Engineer](https://map.stapply.ai/jobs/apple/soc-validation-engineer-jvzkeh) — Beaverton
- [Software Engineer: SoC System Stress Validation](https://map.stapply.ai/jobs/apple/software-engineer-soc-system-stress-validation-jw1gng) — Beaverton
