We are now looking for ASIC Design Interns! NVIDIA MMPLEX team is in Shanghai with more than 300 team members. We deliver cutting-edge IP solutions to multiple NVIDIA product lines, for example: datacenter, GeForce, automotive, networking etc. Our IPs include micro-processor, security, DL/CV accelerators, display, video encoder/decoder, image processor etc. We are looking to grow our teams with the smartest people in the world, join us if you want to learn about world’s leading IP technology and development process.

What you’ll be doing:

Design & verification of hardware Ips
Design & verification methodology study
Work with senior engineers to improve PPA of HW design
Create automation flow to improve engineering efficiency

What we need to see:

Pursuing Master candidate in EE/CS or related field
Basic C/C++ knowledge is a must
Basic digital circuit/verilog knowledge is a must
Fluent English and good communication skills

Ways to stand out from the crowd:

Quick learner, willing to take challenges in a new field
Familiar with ASIC design process is a plus
Python/Perl/Shell/Makefile knowledge is a plus
High level synthesis knowledge is a plus
Video/image processing, CV, security and micro-processor background is a plus

ASIC Intern - 2026