Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.

The Semi-custom and Central IP Silicon (SCIPS) team within CSME is responsible for the architecture, design and development of multiple IPs serving the needs of Cobalt, Xbox and other projects in CSME.

As Microsoft's cloud business continues to grow, the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, we are looking for a Senior Design Engineer to work on leading edge IP development as part of the SCIPS Semi-custom and Central IP Silicon team. The candidate should be a motivated self-starter who will thrive in this cutting-edge technical environment.

#SCHIE #CSME #SCIPS

Responsibilities

You will be responsible for all facets of design from working with the architecture team, implementing the microarchitecture of IP blocks, RTL design, synthesis, static timing analysis, emulation/prototyping and silicon validation. Throughout the program you will be interacting with architects for feature definition, various design teams for leverage and collaboration, and software teams. Experience working with high-speed microarchitectures design required.

Qualifications

Required Qualifications:

Bachelor of Science in Electrical or Computer Engineering
15+ years of experience in silicon logic design
10+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/LINT closure.
Worked with leading-edge technologies 5 nm and newer
Experience in developing high speed CMOS designs
Proficient in System Verilog, C/C++, and scripting languages such as Python, Ruby or Perl

Preferred Qualifications:

Strong design knowledge of the industry standard bus interfaces such as AMBA AXI protocol
Experience in high-performance/power efficient floating-point design
Exposure to Synthesis, Timing constraints, Power Performance Area (PPA) trade-offs
Experience with chip design quality through design and checklist reviews
Good communication and self-motivated that can collaborate with larger teams within Microsoft
Occasional travel

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Senior Silicon Engineer